1. Field of the Invention
Embodiments of the present invention generally relate to a method and apparatus for gas temperature control in a semiconductor processing system.
2. Description of the Related Art
Reliably producing sub-micron and smaller features is one of the key technologies for the next generation of very large scale integration (VLSI) and ultra large scale integration (ULSI) of semiconductor devices. However, as circuit technology continues to evolve, the shrinking dimensions of interconnects in VLSI and ULSI technology have placed growing demands for improved processing capabilities. The multilevel interconnects that lie at the heart of this technology require precise processing of high aspect ratio features, such as vias and other interconnects. Reliable formation of these interconnects is very important to VLSI and ULSI success and to the continued effort to increase circuit density and quality of individual substrates.
As circuit densities increase, the widths of vias, contacts, and other features, as well as the dielectric materials between them, decrease to sub-micron dimensions (e.g., less than 0.20 micrometers or less), whereas the thickness of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increase. Many traditional deposition processes have difficulty filling sub-micron structures where the aspect ratio exceeds 4:1, and particularly where the aspect ratio exceeds 10:1. Therefore, there is a great amount of ongoing effort being directed at the formation of substantially void-free and seam-free sub-micron features having high aspect ratios.
Atomic layer deposition is one deposition technique being explored for the deposition of material layers over features having high aspect ratios. One example of atomic layer deposition comprises the sequential introduction of pulses of gases. For instance, one cycle for the sequential introduction of pulses of gases may comprise a pulse of a first reactant gas, followed by a pulse of a purge gas and/or a pump evacuation, followed by a pulse of a second reactant gas, and followed by a pulse of a purge gas and/or a pump evacuation. The term “gas” as used herein is defined to include a single gas or a plurality gases. Sequential introduction of separate pulses of the first reactant and the second reactant may result in the alternating, self-limiting absorption of monolayers of the reactants on the surface of the substrate, thus, forming a monolayer of material for each cycle. The cycle may be repeated to deposit material to a desired thickness. A pulse of a purge gas and/or a pump evacuation between the pulses of the first reactant gas and the pulses of the second reactant gas reduces the likelihood of gas phase reactions of the reactants due to excess amounts of the reactants remaining in the chamber.
As a single monolayer of material is deposited in each cycle, the ability to rapidly deliver and remove reactant and purge gases from the chamber has a substantial effect on substrate throughput. Using smaller volumes of gases reduces cycles times. However, when smaller volumes of gases are used, it becomes critical that the gas does not condense on the walls of the processing equipment. At such small volumes, condensation of the gas on the processing equipment walls prevents the accurate control and measured delivery of the gases to the processing chamber. Therefore, temperature control of gases delivered to a processing chamber becomes much more important than in conventional chemical vapor deposition (CVD) processing equipment.
Therefore, there is a need for processing methods and apparatus that enhance temperature control of gases delivered to semiconductor processing chambers.